1. Technical Field
The present invention relates to a test apparatus, a synchronization module, and a synchronization method.
2. Related Art
A test apparatus provided with a plurality of test circuits is known as an apparatus for testing a device under test such as a semiconductor chip as shown in, for example, International Publication Pamphlet No. 2003/062843 and Japanese Patent Application Publication No. 2007-52028. Here, the plurality of test circuits desirably operate in synchronization.
The plurality of test circuits of the test apparatus operate according to a pre-supplied program, sequence, or the like. The test apparatus causes all of the test circuits to operate in synchronization by initiating execution of the programs in synchronization.
When many tests are being performed, however, it is not enough to simply synchronize the timing of the initiation of the program for each test circuit. For example, while executing programs, a subsequent step may be desirably executed in synchronization after all of the test circuits have reached a stand-by state.
In this case, if each program is designed such that each test circuit requires the same amount of time to execute the corresponding and therefore reaches the stand-by state at simultaneously, the following tests can be performed in synchronization by synchronizing the initiation timing of the following programs. However, designing the programs in this way requires a great deal of time and effort.